Motorola MVME2400 Series Manuale di Servizio Scaricare il pdf (Pagina 139)

100

101

Registers

http://www.mcg.mot.com/literature 2-81

PPC Error Status Register

The Error Status Register

(ESTAT) provides an array of status bits

pertaining to the various errors that the PHB can detect. The bits within the

ESTAT are defined in the following paragraphs.

OVF Error Status Overflow. This bit is set when any error is

detected and any of the error status bits are already set. It

may be cleared by writing a 1 to it; writing a 0 to it has no

effect.

XBTO PPC Address Bus Time-out. This bit is set when the PPC

timer times out. It may be cleared by writing a 1 to it;

writing a 0 to it has no effect. When the XBTOM bit in the

EENAB register is set, the assertion of this bit will assert

MCHK to the master designated by the XID field in the

EATTR register. When the XBTOI bit in the EENAB

interrupt through the MPIC.

XDPE PPC Data Parity Error. This bit is set when the PHB

detects a data bus parity error. It may be cleared by writing

a 1 to it; writing a 0 to it has no effect. When the XDPEM

bit in the EENAB register is set, the assertion of this bit

will assert MCHK to the master designated by the XID

Address $FEFF0024

Bit

0123456789

Name ESTAT

OVF

XBTO

XDPE

PPER

PSER

PSMA

PRTA

Operation R R R

R/C

Reset $00 $00 $00

1 2 ... 134 135 136 137 138 139 140 141 142 143 144 ... 353 354

Commenti su questo manuale

Nessun commento

Motorola MVME2400 Series Manuale di Servizio Pagina 139

Commenti su questo manuale

Prodotti e manuali riguardandi Processori Motorola MVME2400 Series