Motorola MVME2400 Series Manuale di Servizio Scaricare il pdf (Pagina 127)

Registers

http://www.mcg.mot.com/literature 2-69

General Control-Status/Feature Registers

The General Control-Status Register

(GCSR) provides miscellaneous

control and status information for the PHB. The bits within the GCSR are

defined as follows:

LEND Endian Select. If set, the PPC bus is operating in little

endian mode. The PPC address will be modified as

described in the section titled “When PPC Devices are

Little Endian”. When LEND is clear, the PPC bus is

operating in big endian mode, and all data to/from PCI is

swapped as described in the section titled “When PPC

Devices are Big-Endian.”

PFBR PCI Flush Before Read. If set, the PHB will guarantee

that all PPC initiated posted write transactions will be

completed before any PCI initiated read transactions will

be allowed to complete. When PFBR is clear, there will be

no correlation between these transaction types and their

order of completion. Please refer to the section on

Transaction Ordering for more information.

XMBH PPC Master Bus Hog. If set, the PPC master of the PHB

will operate in the Bus Hog mode. Bus Hog mode means

the PPC master will continually request the PPC bus for

the entire duration of each transfer. If Bus Hog is not

Address $FEFF0008

Bit

0123456789

Name GCSR

LEND

PFBR

HMBH

XFBR

XBT1

XBT0

P64

OPIC

XID1

XID0

Operation

R/W

Reset

1 2 ... 122 123 124 125 126 127 128 129 130 131 132 ... 353 354

Nessun commento

Motorola MVME2400 Series Manuale di Servizio Pagina 127