Motorola CPU32 Manuale Utente Scaricare il pdf (Pagina 407)

100

101

Floating Point Instructions

MOTOROLA M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL 5-105

FREM IEEE Remainder FREM

(MC6888X, M68040FPSP)

Floating-Point Status Register:

Condition Codes: Affected as described in 3.6.2 Conditional Testing.

Quotient Byte: Loaded with the sign and least significant seven bits of the

qotient (FPn ÷ Source). The sign of the quotient is the

exclusive-OR of the sign bits of the source and destination

operands.

Exception Byte: BSUN Cleared

SNAN Refer to 1.6.5 Not-A-Numbers.

OPERR Set if the source is zero or the destination is

infinity; cleared otherwise.

OVFL Cleared

UNFL Refer to underflow in the appropriate user’s

manual.

DZ Cleared

INEX2 Cleared

INEX1 If < fmt > is packed, refer to inexact result on

decimal input in the appropriate user’s

manual; cleared otherwise.

Accrued Exception Byte: Affected as described in IEEE exception and trap compati-

bility in the appropriate user’s manual.

Instruction Format:

Instruction Fields:

Coprocessor ID ﬁeld—Speciﬁes which coprocessor in the system is to execute this

instruction. Motorola assemblers default to ID = 1 for the ﬂoating-point

coprocessor.

1514131211109876543210

1111

COPROCESSOR

000

EFFECTIVE ADDRESS

MODE REGISTER

0 R/M 0

SOURCE

SPECIFIER

DESTINATION

0100101

1 2 ... 402 403 404 405 406 407 408 409 410 411 412 ... 645 646

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