Integer Instructions
4-52 M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL MOTOROLA
BFTST Test Bit Field BFTST
(MC68020, MC68030, MC68040)
Instruction Fields:
Effective Address field—Specifies the base location for the bit field. Only data register
direct or control addressing modes can be used as listed in the following table:
Do field—Determines how the field offset is specified.
0 — The offset field contains the bit field offset.
1 — Bits 8 – 6 of the extension word specify a data register that contains the offset;
bits 10 – 9 are zero.
Offset field—Specifies the field offset, depending on Do.
If Do = 0, the offset field is an immediate operand; the operand value is in the range
of 0 – 31.
If Do = 1, the offset field specifies a data register that contains the offset. The value
is in the range of – 2
31
to 2
31
– 1.
Dw field—Determines how the field width is specified.
0 — The width field contains the bit field width.
1 — Bits 2 – 0 of the extension word specify a data register that contains the width;
bits 4 – 3 are zero.
Width field—Specifies the field width, depending on Dw.
If Dw = 0, the width field is an immediate operand, operand values in the range of 1
– 31 specify a field width of 1 – 31, and a value of zero specifies a width of 32.
If Dw = 1, the width field specifies a data register that contains the width. The value
is modulo 32; values of 1 – 31 specify field widths of 1 – 31, and a value of zero
specifies a width of 32.
Addressing Mode Mode Register Addressing Mode Mode Register
Dn 000 reg. number:Dn (xxx).W 111 000
An — — (xxx).L 111 001
(An) 010 reg. number:An #<data> — —
(An) + — —
– (An) — —
(d
16
,An) 101 reg. number:An (d
16
,PC) 111 010
(d
8
,An,Xn) 110 reg. number:An (d
8
,PC,Xn) 111 011
(bd,An,Xn) 110 reg. number:An (bd,PC,Xn) 111 011
([bd,An,Xn],od) 110 reg. number:An ([bd,PC,Xn],od) 111 011
([bd,An],Xn,od) 110 reg. number:An ([bd,PC],Xn,od) 111 011
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