Motorola MVME2400 Series Manuale di Servizio Pagina 107
- Pagina / 178
- Indice
- RISOLUZIONE PROBLEMI
- SEGNALIBRI
Valutato. / 5. Basato su recensioni clienti
ENV - Set Environment
http://www.mcg.mot.com/literature 6-5
6
Network PReP-Boot Mode Enable [Y/N] = N?
Negate VMEbus SYSFAIL* Always [Y/N] = N?
SCSI Bus Reset on Debugger Startup [Y/N] = N?
Primary SCSI Bus Negotiations Type [A/S/N] = A?
Primary SCSI Data Bus Width [W/N] = N?
Secondary SCSI identifier = 07?
Select the identifier. (Default = 07.)
Y
Enable PReP-style network booting (same boot image
from a network interface as from a mass storage
device).
N
Do not enable PReP-style network booting. (Default)
Y
Negate the VMEbus SYSFAIL∗ signal during board
initialization.
N
Negate the VMEbus SYSFAIL∗ signal after
successful completion or entrance into the bug
command monitor. (Default)
Y
Local SCSI bus is reset on debugger setup.
N
Local SCSI bus is not reset on debugger setup.
(Default)
A
Asynchronous SCSI bus negotiation. (Default)
S
Synchronous SCSI bus negotiation.
N
None.
W
Wide SCSI (16-bit bus).
N
Narrow SCSI (8-bit bus). (Default)
- MVME2400-Series 1
- Single Board Computer 1
- Installation and Use 1
- Restricted Rights Legend 2
- Document Terminology 4
- Safety Summary 5
- Safety Depends On You 5
- Contents 9
- Glossary 12
- List of Figures 13
- List of Tables 15
- 1Preparing and Installing the 17
- MVME2400-Series Module 17
- MVME240x Module 18
- PMCspan Expansion Mezzanine 19
- PCI Mezzanine Cards (PMCs) 19
- VMEsystem Enclosure 20
- System Console Terminal 20
- 1 2 3 4 5 6 7 8 25
- ESD Precautions 29
- 2064 9708 31
- Primary PMCspan 32
- 2081 9708 33
- Secondary PMCspan 34
- 2065 9708 35
- INTERRUPT ACKNOWLEDGE 38
- DEBUG port on 38
- Installation Considerations 39
- 2Operating Instructions 41
- Switches 42
- MVME240x 43
- Status Indicators 44
- 10/100 BASET Port 44
- DEBUG Port 45
- Operating Instructions 46
- PMC Slots 47
- 3Functional Description 49
- (RST) and Abort (ABT) 50
- General Description 52
- Block Diagram 52
- (PHB) ASIC 55
- PCI Bus Latency 56
- 3:1 clock ratio: 56
- PPC Bus Latency 58
- Assumptions 60
- SDRAM Memory 62
- Functional Description 66
- Flash Memory 67
- Ethernet Interface 70
- VMEbus Interface 73
- Asynchronous Debug Port 73
- PCI Host Bridge (PHB) 75
- Interrupt Controller (MPIC) 76
- Programmable Timers 76
- 4Programming the MVME240x 79
- Processor Bus Memory Map 80
- PCI Local Bus Memory Map 81
- VMEbus Memory Map 81
- Programming Considerations 82
- Interrupt Handling 84
- DMA Channels 86
- Sources of Reset 86
- Endian Issues 88
- Programming the MVME240x 90
- PPCBug Overview 91
- PPCBug Basics 91
- Diag> 92
- Memory Requirements 93
- PPCBug Implementation 93
- Debugger Commands 96
- Table 5-1. Debugger Commands 97
- Diagnostic Tests 100
- Using PPCBug 101
- 6Modifying the Environment 103
- Modifying the Environment 104
- ENV - Set Environment 105
- ∗ signal after 107
- ∗ signal during board 107
- 00001000? 111
- (Default) 112
- Ordering Related 119
- Documentation 119
- Manufacturers’ Documents 120
- Document Title and Source 121
- Publication 121
- Related Specifications 123
- Specifications 127
- Table B-1. MVME240 128
- Specifications (Continued) 128
- Cooling Requirements 129
- EMC Regulatory Compliance 130
- CConnector Pin Assignments 131
- VMEbus Connector - P1 132
- Connector Pin Assignments 133
- VMEbus Connector - P2 134
- Pin Assignments 136
- CPU Debug Connector - J1 137
- PCI Expansion Connector - J6 142
- DTroubleshooting the MVME240x 151
- Solving Startup Problems 152
- Troubleshooting the MVME240x 153
- Numerics 169
- Single Board Computer 177
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